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Layout Optimization of Integrated Inductors and Capacitors Using TGV Technology
- Source :
- Components, Packaging, and Manufacturing Technology, IEEE Transactions on; January 2024, Vol. 14 Issue: 1 p106-113, 8p
- Publication Year :
- 2024
-
Abstract
- In this article, an implementation method for compact basic passive devices is proposed, in which the vertical interconnects are optimized by the through glass vias (TGVs) technique. The ultrafast laser-induced etching method is used to achieve TGV structure with high aspect ratio, which is the cornerstone for achieving high integration density passive devices. Inductors and capacitors as widely employed passive devices are straightforward and convincing examples to illustrate the application of TGV interconnects. Three-dimensional spiral inductor as a research prototype utilizes high aspect ratio TGV technique to equalize planar and vertical interconnects. On the other hand, the layout is further optimized and discussed by implementing different diameters of TGV on the same glass substrate. From the harvested analysis results, the inductor can achieve the desired inductance density of 198.29 nH/mm2. Subsequently, we first proposed a compact 3-D interdigital capacitor loaded with TGVs array. By further tapping into the vertical space, this configuration takes full advantage of the coupled electric fields between TGVs within the array in addition to the lateral electric fields between adjacent fingers. Additionally, for the purpose of verification, TGV-based 3-D inductors and capacitors have been fabricated and measured. Excellent consistency can be acquired from the extracted inductance and capacitance.
Details
- Language :
- English
- ISSN :
- 21563950 and 21563985
- Volume :
- 14
- Issue :
- 1
- Database :
- Supplemental Index
- Journal :
- Components, Packaging, and Manufacturing Technology, IEEE Transactions on
- Publication Type :
- Periodical
- Accession number :
- ejs65651428
- Full Text :
- https://doi.org/10.1109/TCPMT.2023.3347407