Development of a benchmark suite for large vector architectures into a continuous integration workflow

En el món del "High-Performance Computing", el processador és essencial. Recentment, Europa està fent grans esforços en promoure tecnologia europea. La "European Processor Initiative" sorgeix d'aquest esforç. Com a part de la iniciativa, múltiples processadors estan sent dissenyats. Alguns implementant l'arquitectura "RISC-V", una "ISA" "open-source". Al llarg del desenvolupament del processador, disposar d'eines és fonamental per facilitar el testatge i automatitzar tasques. Aquest treball final de grau es focalitza en millorar una "pipeline" de "Continuous integration" emprada per detectar errors en un entorn Linux i en una "Field Programmable Gate Array (FPGA)" emulant un comportament d'usuari final. In the High-Performance Computing world, the processor is essential. In recent years, Europe has devoted a lot of effort into promoting European technology. The European Processor Initiative stems from this effort. As part of the initiative, multiple processors are being developed. Some implementing the RISC-V architecture, an open-source ISA. During the development of a processor, tools are fundamental to ease testing and automatize tasks. This final degree project focuses on improving a Continuos Integration pipeline used to detect bugs in an Field Programmable Gate Array (FPGA) and Linux environments emulating final user behaviour.