FPGA Implementation of Optimal Filtering Algorithm for TileCal ROD System

Traditionally, Optimal Filtering Algorithm has been implemented using general purpose programmable DSP chips. Alternatively, new FPGAs provide a highly adaptable and flexible system to develop this algorithm. TileCal ROD is a multi-channel system, where similar data arrives at very high sampling rates and is subject to simultaneous tasks. It include different FPGAs with high I/O and with parallel structures that provide a benefit at a data analysis. The Optical Multiplexer Board is one of the elements presents in TileCal ROD System. It has FPGAs devices that present an ideal platform for implementing Optimal Filtering Algorithm. Actually this algorithm is performing in the DSPs included at ROD Motherboard. This work presents an alternative to implement Optimal Filtering Algorithm.