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On demand spatially controlled fabrication of single photon emitters in Si

Authors :
Hlawacek, G.
Klingner, N.
Kentsch, U.
Erbe, A.
Jagtap, N.
Fowley, C.
Abrosimov, N.
Helm, M.
Berencen, Y.
Hollenbach, M.
Astakhov, G.
Source :
AVS, 06.-11.11.2022, Pittsburgh, USA, Eu-F-N workshop, 31.08.-02.09.2022, Hamburg, Deutschland, ÖPG, 26.-30.09.2022, Leoben, Österreich
Publication Year :
2022

Abstract

Single photon emitters (SPE) are fundamental building blocks for future quantum technology applications. However, many ap- proach lack the required spatial placement accuracy and Si tech- nology compatibility required for many of the envisioned applica- tions. Here, we present a method to fabricate at will placed single or few SPEs emitting in the telecom O-band in Silicon [1] . The successful integration of these telecom quantum emitters into photonic structures such as micro-resonators, nanopillars and photonic crystals with sub-micrometer precision paves the way to- ward a monolithic, all-silicon-based semiconductor-supercon- ductor quantum circuit for which this work lays the foundations. To achieve our goal we employ home built AuSi liquid metal alloy ion sources (LMAIS) and an Orsay Physics CANION M31Z+ focused ion beam (FIB). Silicon-on-insulator substrates from different fabri- cation methods have been irradiated with a spot pattern. 6 to 500 Si2+ ions have been implanted per spot using an energy of 40 keV. For the analysis and confirmation of the fabrication of true SPEs a home build photo luminescence setup has been used. G-centers formed by the combination of two carbon atoms and a silicon atom are confirmed by measurements of zero phonon lines (ZPL) at the expected wave length of 1278 nm for the case of carbon rich SOI wafers. In the case of ultra clean SOI wafers and high ion fluxes emission from tri-interstitial Si complexes is observed. The SPE nature of these so called W-centers has also been confirmed by ZPL measurements at 1218 nm. The achieved lateral SPE placement accuracy is below 100 nm in both cases and the success rate of SPE formation is more than 50%. After a discus- sion of the formation statistic we also present an approach how our FIB based approach can be upscaled to wafer-scale nanofabrication of telecom SPEs compatible with complementary metal oxide semiconductor (CMOS) technology for very large scale integration (VLSI).

Details

Language :
English
Database :
OpenAIRE
Journal :
AVS, 06.-11.11.2022, Pittsburgh, USA, Eu-F-N workshop, 31.08.-02.09.2022, Hamburg, Deutschland, ÖPG, 26.-30.09.2022, Leoben, Österreich
Accession number :
edsair.dedup.wf.001..b47b263cad47c04dd779c184dd51a1f5