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A Compact and Cost-efficient Edge Termination Design for High Voltage 4H-SiC Devices

Authors :
L. Zhang
A. B. Renz
Q. Cao
Vishal Shah
Marina Antoniou
Tianxiang Dai
Philip Mawby
Peter M. Gammon
Oliver J. Vavasour
Source :
2021 33rd International Symposium on Power Semiconductor Devices and ICs (ISPSD).
Publication Year :
2021
Publisher :
IEEE, 2021.

Abstract

We have experimentally verified a compact trench-assisted space-modulated junction termination extension (TSM-JTE) structure which has been designed for high voltage SiC devices. The proposed termination design introduces shallow trench structures into the conventional JTE implanted region, effectively creating a multi-zone JTE with a single implant, and hence greatly broadens the process window for a JTE termination. The TSM-JTE structure is compact and cost effective especially at higher voltages (≥ 10 kV) as it consumes less chip area while requiring only a single implant for the termination region. In this paper, 5 kV and 10 kV SiC PiN diodes have been fabricated and characterized.

Details

Database :
OpenAIRE
Journal :
2021 33rd International Symposium on Power Semiconductor Devices and ICs (ISPSD)
Accession number :
edsair.doi...........01e15f3e4f3a7a2f90ac7eb2c9e89433
Full Text :
https://doi.org/10.23919/ispsd50666.2021.9452270