Cite
Improving the Memory Window/Resistance Variability Trade-Off for 65nm CMOS Integrated HfO2 Based Nanoscale RRAM Devices
MLA
Jubin Hazra, et al. “Improving the Memory Window/Resistance Variability Trade-Off for 65nm CMOS Integrated HfO2 Based Nanoscale RRAM Devices.” 2019 IEEE International Integrated Reliability Workshop (IIRW), Oct. 2019. EBSCOhost, https://doi.org/10.1109/iirw47491.2019.8989872.
APA
Jubin Hazra, Nathaniel C. Cady, Karsten Beckmann, Maximilian Liehr, & Sarah Rafiq. (2019). Improving the Memory Window/Resistance Variability Trade-Off for 65nm CMOS Integrated HfO2 Based Nanoscale RRAM Devices. 2019 IEEE International Integrated Reliability Workshop (IIRW). https://doi.org/10.1109/iirw47491.2019.8989872
Chicago
Jubin Hazra, Nathaniel C. Cady, Karsten Beckmann, Maximilian Liehr, and Sarah Rafiq. 2019. “Improving the Memory Window/Resistance Variability Trade-Off for 65nm CMOS Integrated HfO2 Based Nanoscale RRAM Devices.” 2019 IEEE International Integrated Reliability Workshop (IIRW), October. doi:10.1109/iirw47491.2019.8989872.