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Reliability challenges for barrier/liner system in high aspect ratio through silicon vias

Authors :
Eric Beyne
Gerald Beyer
Yunlong Li
Michele Stucchi
C. Wu
Els Van Besien
Xiaoping Shi
Ingrid De Wolf
Kristof Croes
Stefaan Van Huylenbroeck
Source :
Microelectronics Reliability. 54:1949-1952
Publication Year :
2014
Publisher :
Elsevier BV, 2014.

Abstract

The reliability results for barrier/liner systems in different high aspect ratio (5 × 50 μm) through silicon vias (TSV) are presented. Quite a few factors can influence the TSV barrier/liner reliability performance, including the TSV trench etch process, the oxide liner material/thickness, etc. The challenges for more advanced TSV technology nodes (e.g. 3 × 40 μm) are also discussed and possible solutions are proposed.

Details

ISSN :
00262714
Volume :
54
Database :
OpenAIRE
Journal :
Microelectronics Reliability
Accession number :
edsair.doi...........073abd527fda4933c4a402df86dfde82
Full Text :
https://doi.org/10.1016/j.microrel.2014.07.077