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Array-Level Programming of 3-Bit per Cell Resistive Memory and Its Application for Deep Neural Network Inference

Authors :
Xu Han
Shimeng Yu
Jae-sun Seo
Yandong Luo
Zhilu Ye
Hugh J. Barnaby
Source :
IEEE Transactions on Electron Devices. 67:4621-4625
Publication Year :
2020
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2020.

Abstract

The requirement of multilevel cell (MLC) resistive random access memory (RRAM) for computing is different than that for MLC storage. It generally requires a linearly spaced conductance median and an ultratight conductance distribution, as the column current are summed up for analog computation. In this article, 3-bit per cell RRAM that is suitable for accurate inference of a deep neural network (DNN) is demonstrated, with ultratight conductance distribution ( $5.3 \times $ and $4.4 \times $ , respectively, compared to the 3-bit per cell RRAM used as MLC storage.

Details

ISSN :
15579646 and 00189383
Volume :
67
Database :
OpenAIRE
Journal :
IEEE Transactions on Electron Devices
Accession number :
edsair.doi...........129ade9e188e436a658833c7e0b78c37