A New Methodology for Characterizing the Progressive BD of Hfo2/Sio2 Metal Gate Stacks

High-k/metal gate stacks are a promising and viable approach for CMOS scaling. The high permittivity of the dielectric used can reduce the leakage current while preserving the low equivalent oxide (EOT) thickness needed for the future step of technologies. The recent advances are very encouraging, but reliability aspects, in particular TDDB characteristics, are much less developed. In this paper we investigate the issue of progressive dielectric breakdown, a debated aspect (1-3), which is critical for evaluation of the device lifetime.