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Hybrid III–V/Si-CMOS PDK for Monolithic Heterogeneously-Integrated III–V/Si Technology Platforms

Authors :
Siau Ben Chiah
Eugene A. Fitzgerald
Xing Zhou
Kenneth Eng Kian Lee
Binit Syamal
Cheng Yeow Ng
Source :
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT).
Publication Year :
2020
Publisher :
IEEE, 2020.

Abstract

The needs of electronics are endless. The complexity in designing a circuit to meet high demand markets has increased daily. Furthermore, the urge for high power gain for high-efficiency RF applications leads to searching a replacement of Si material. III–V compound semiconductor (CS) materials provide a promising technology booster but integrating into the state-of-the-art Si equipment for VLSI faces some challenges for circuit designs and device fabrication. To ease the design complexity, Process Design Kit (PDK) has been widely used for modern semiconductor designs. This paper presents cross-platform III–V/Si circuit simulation, schematic and layout design, and integration of III–V/Si design verification for VLSI on 200-mm wafer in Si CMOS fabrication environment.

Details

Database :
OpenAIRE
Journal :
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)
Accession number :
edsair.doi...........1b67d916e2518a3be61023152fb19ae3
Full Text :
https://doi.org/10.1109/icsict49897.2020.9278196