A Novel Two-Stage Timing Mismatch Calibration Technique for Time-Interleaved ADCs

MLA

Zhifei Lu, et al. “A Novel Two-Stage Timing Mismatch Calibration Technique for Time-Interleaved ADCs.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, June 2023, pp. 887–91. EBSCOhost, https://doi.org/10.1109/tvlsi.2023.3235393.

APA

Zhifei Lu, Wei Zhang, He Tang, & Xizhu Peng. (2023). A Novel Two-Stage Timing Mismatch Calibration Technique for Time-Interleaved ADCs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 31, 887–891. https://doi.org/10.1109/tvlsi.2023.3235393

Chicago

Zhifei Lu, Wei Zhang, He Tang, and Xizhu Peng. 2023. “A Novel Two-Stage Timing Mismatch Calibration Technique for Time-Interleaved ADCs.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 (June): 887–91. doi:10.1109/tvlsi.2023.3235393.