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A Low Power 0.4-1 Ghz Receiver Front-End with an Enhanced Third-Order-Harmonic-Rejecting Series N-Path Filter
- Source :
- 2019 China Semiconductor Technology International Conference (CSTIC).
- Publication Year :
- 2019
- Publisher :
- IEEE, 2019.
-
Abstract
- In this paper, a low power 0.4-1 GHz receiver front-end (RX-FE) with an enhanced third-order-harmonic-rejecting series N-path filter (3rd-HRSNPF) is proposed. The 3rd-HRSNPF provides sufficient third order harmonic rejection (HR3) to eliminate the harmonic rejection mixer (HRM). The receiver front-end has been implemented in a 40 nm CMOS technology. Simulation results show that it achieves a HR3 of 53 dB without HRM in case of 6% duty-cycle error and 0.5° phase error. Operating from 0.4–1 GHz, its power consumption and double-sideband noise figure (DSB NF) are only 8.2–9.9 mW and 3.0–3.2 dB, respectively.
- Subjects :
- Physics
Series (mathematics)
business.industry
020208 electrical & electronic engineering
Electrical engineering
02 engineering and technology
Noise figure
Power (physics)
Third order
CMOS
Filter (video)
Path (graph theory)
0202 electrical engineering, electronic engineering, information engineering
Harmonic
business
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2019 China Semiconductor Technology International Conference (CSTIC)
- Accession number :
- edsair.doi...........1dfa388ffad9bbbf1d71c3683d4656a0
- Full Text :
- https://doi.org/10.1109/cstic.2019.8755784