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GaN HEMTs with Breakdown Voltage of 2200 V Realized on a 200 mm GaN-on-Insulator(GNOI)-on-Si Wafer

Authors :
Chuan Seng Tan
Kwang Hong Lee
Geok Ing Ng
Hanlin Xie
Eugene A. Fitzgerald
Zhihong Liu
Source :
2019 Symposium on VLSI Technology.
Publication Year :
2019
Publisher :
IEEE, 2019.

Abstract

GaN-on-Si has revealed its great potential for next-generation power electronics applications, however, there remains a challenge in increasing the breakdown voltage $(BV_{\text{off}})$ due to the limit of the GaN epilayer thickness on large size wafers. In this work we propose a GaN-on-Insulator (GNOI)-on-Si structure to address this issue. A 200 mm GNOI-on-Si wafer was prepared through removing the original Si substrate of a GaN-on-Si wafer and bonding onto a fresh SiO 2 /Si substrate. HEMTs were fabricated with measured $BV_{\text{off}}$ much larger than those on GaN-on-Si. Record high $BV \text{off}$ up to 2200 V and high figure-of-merit (FOM) $BV_{off^2}/R_{\text{on, sp}}$ up to 1.87 GW/cm2 have been achieved in the HEMTs on a 200 mm GNOI-on-Si wafer with a thin GaN epilayer of $3.2 {\mu m}$ .

Details

Database :
OpenAIRE
Journal :
2019 Symposium on VLSI Technology
Accession number :
edsair.doi...........25866f8a82aca666162428d77fd314de