A 5.4Gb/s adaptive equalizer with unit pulse charging technique in 0.13µm CMOS

An adaptive equalizer that operates at 5.4Gb/s with unit pulse charging technique is introduced in this paper. The proposed method has a simple architecture with compensating the channel adaptively. The common mode detection of the equalizer filter output with the resister ladder that can generate the reference voltages depending on the common level of the output of the filter is presented as well. The eye opening of the equalizer at 5.4Gb/s is 0.61UI with a 2m DisplayPort cable, and the BER is less than 10−12 at the same conditions. The power consumption is 17.64mW, and our equalizer occupies a core area of 0.069mm2 using 0.13µm CMOS process.