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Micro via filling plating technology for IC substrate applications

Authors :
Chih‐Hao Hsu
Jui‐Hsia Hsu
Kuo‐Hsing Lan
Cliff Lee
Philip Lu
Cheng‐Ching Yeh
Jordan Chen
Ken Lee
Wei-Ping Dow
Source :
Circuit World. 30:26-32
Publication Year :
2004
Publisher :
Emerald, 2004.

Abstract

The trend of electronic products toward lighter, thinner, and faster transmission is challenging the printed circuit board industry to incorporate high density interconnection technology (such as build‐up and semi‐additive processes). Micro stacked via is one technology utilized to produce high‐density structures. Dielectric resin, conductive paste or via plating are usually applied for the filling process. As compared with other filling methods, via filling plating technology has advantages in offering a shorter process and higher reliability. This paper discusses the influence of different equipment design, operating conditions and additives on via filling plating technology.

Details

ISSN :
03056120
Volume :
30
Database :
OpenAIRE
Journal :
Circuit World
Accession number :
edsair.doi...........29a060fe656757b8fb48b26af7659a81
Full Text :
https://doi.org/10.1108/03056120410520588