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Design of a power optimized 1024-point 32-bit single precision FFT processor

Authors :
Yangming Li
Ping Luo
Zhang Ziji
Yajuan He
Shaowei Zhen
He Yanming
Source :
2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
Publication Year :
2014
Publisher :
IEEE, 2014.

Abstract

Fourier transform is the basic operation between time and frequency domain transformation. As a key operation of digital signal processing system, Fast Fourier Transform (FFT) is widely used in many fields such as communication, biomedical signal processing and image processing, which require a high precision of processed signal. To meet the requirement, the floating point number can be used to improve the signal quantization noise ratio (SQNR) greatly. In this paper, we proposed a power optimized 1024-point high precision FFT processor with 32-bit single precision floating point number for both input and output. Simulation results show that the proposed FFT works at 1.2 V, consumes 17.6 mW with a 0.13 µm CMOS technology. Its SQNR can reach 97 dB, which is ∼2× higher than the conventional design when maintaining the same power consumption. In the meanwhile, it gains ∼99% power reduction when maintaining the same SQNR.

Details

Database :
OpenAIRE
Journal :
2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)
Accession number :
edsair.doi...........2cc332dc5e96525984fb9ad65490f7eb