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DCPG: Double-control power gating technique for a 28 nm Cortex™-A9 MPCore Quad-core processor

Authors :
Jinhui Wang
Ligang Hou
Liang Qian
Na Gong
Peiyuan Wan
Source :
ASICON
Publication Year :
2015
Publisher :
IEEE, 2015.

Abstract

As the technology scales into deep sub-micron regime, leakage power has become comparable to dynamic power, playing an important role in total power consumption of modern processors. Power gating is a well-known technique to reduce leakage power by switching off the power supply of idle logic blocks. This paper proposes a novel Double-Control Power Gating (DCPG) which can lower the IR drop and enable more power savings. We applied the proposed technique to the embedded ARM® Cortex™-A9 MPCore Quad-core processor in 28 nm technology. Experimental results show that DCPG achieves 99.8% leakage power reduction when the CPU is powered off.

Details

Database :
OpenAIRE
Journal :
2015 IEEE 11th International Conference on ASIC (ASICON)
Accession number :
edsair.doi...........3663ba26ca9b2a9c90147752e6b2b0de