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Net diagnosis using stuck-at and transition fault models

Authors :
Vishwani D. Agrawal
Lixing Zhao
Source :
VTS
Publication Year :
2012
Publisher :
IEEE, 2012.

Abstract

Given the test output from a defective digital circuit, we identify one or more faulty signal nets that may have caused the observed output results. Although we make no assumption about the actual defect, our diagnosis is based upon a dictionary pre-generated by simulating the test vectors for their detection of collapsed single stuck-at and transition faults at each primary output. First, novel three-stage candidate filtering system and candidate ranking system are proposed to reduce and rank candidate faults. A more balanced ranking method compared to previous works and a ranking strategy which combined both overall and per-test performance together are used in these two systems. Then, the ranked candidate list is expanded by uncollapsing faults. A rank for every candidate net is calculated based on the number of top-ranked suspected faults on it. Experiments were conducted by injecting multiple stuck-at or transition delay faults on either single or double nets in certain ISCAS85 circuit. When tests generated by targeting single stuck-at and transition faults were used, our diagnosis algorithm shows good diagnosability and resolution in identifying single and double faulty nets.

Details

Database :
OpenAIRE
Journal :
2012 IEEE 30th VLSI Test Symposium (VTS)
Accession number :
edsair.doi...........39403593c6943dd1b14553cfaeab5c75
Full Text :
https://doi.org/10.1109/vts.2012.6231106