Improving Interface State Density of TiN/HfO2/IL Gate Stack on Si0.5 Ge0.5 by Optimization of Post Metallization Annealing and Oxygen Pressure

In this paper, we fabricated TiN/HfO 2 -based gate stacks on epi- Si 0.5 Ge 0.5 substrates with remarkably low interface trap density (Dit) by optimizing the temperature and pressure in the annealing ambient. We found that oxygen in ambient play a subtle role in the resultant properties of the gate stack. During annealing, insufficient oxygen supply to the stack cannot effectively repair the slow oxide traps, while too much oxygen will cause excess SiGe surface oxidation and lead to higher Dit. For the first time, the impact of diffused oxygen during thermal processing on the electrical properties of the TiN/HfO 2 /IL/SiGe gate stack is systematically investigated.