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A correlation-based background calibration technology for the pipeline A/D Converter
- Source :
- 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT).
- Publication Year :
- 2016
- Publisher :
- IEEE, 2016.
-
Abstract
- This paper describes a correlation-based background calibration method to calibrate the linear and non-linear gain errors of pipelined ADCs. The calibration algorithm introduces a sequence PN to the input of the sub-ADC to have the output code modulated, estimates the errors by correlating the injected sequence with the output code, and calibrates the errors based on a LMS algorithm. Simulation results show that, with an equivalent gain error 2% and a 3-order nonlinear gain error 2%, after calibration, the measured DNL and INL were improved to −0.46/0.88 LSB and −0.81/0.92 LSB, respectively, and the SFDR/SNDR are improved to 93.8dB and78.6 dB, respectively.
- Subjects :
- Sequence
Spurious-free dynamic range
Computer science
Pipeline (computing)
020208 electrical & electronic engineering
020206 networking & telecommunications
02 engineering and technology
Least mean squares filter
Correlation
Least significant bit
Control theory
Hardware_INTEGRATEDCIRCUITS
0202 electrical engineering, electronic engineering, information engineering
Code (cryptography)
Calibration
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)
- Accession number :
- edsair.doi...........422c9b6174b0285d4fcd40ac4c08a738