Development and verification of a scalable GaAs pHEMT FEM thermal model

An accurate scalable 3-D thermal finite-element-method (FEM) model is developed and verified for a GaAs pHEMT process using gate resistance thermometry (GRT) as the basis. The measurement technique is suited to scalable model development, since the gate metal is in intimate proximity to the heat source in the device channel. The FEM model is demonstrated to scale with channel power dissipation and gate periphery, simultaneously. Agreement to within 6% of all measured configurations/operating conditions is demonstrated. The model is suitable for inclusion in semiconductor foundry design kits to determine thermal resistance values for nonlinear device models, and also for thermal analyses of power amplifier layouts.