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MARS: A Multiprocessor-Based Programmable Accelerator
- Source :
- IEEE Design & Test of Computers. 4:28-36
- Publication Year :
- 1987
- Publisher :
- Institute of Electrical and Electronics Engineers (IEEE), 1987.
-
Abstract
- MARS, short for microprogrammable accelerator for rapid simulations, is a multiprocessor-based hardware accelerator that can efficiently implement a wide range of computationally complex algorithms. In addition to accelerating many graph-related problem solutions, MARS is ideally suited for performing event-driven simulations of VLSI circuits. Its highly pipelined and parallel architecture yields a performance comparable to that of existing special-purpose hardware simulators. MARS has the added advantage of flexibility because its VLSI processors are custom-designed to be microprogrammable and reconfigurable. When programmed as a logic simulator, MARS should be able to achieve 1 million gate evaluations per second.
- Subjects :
- Very-large-scale integration
Flexibility (engineering)
business.industry
Computer science
Logic simulation
Multiprocessing
Mars Exploration Program
ComputerSystemsOrganization_PROCESSORARCHITECTURES
Telecommunications network
Acceleration
Hardware and Architecture
Embedded system
Hardware acceleration
Electrical and Electronic Engineering
business
Software
Subjects
Details
- ISSN :
- 07407475
- Volume :
- 4
- Database :
- OpenAIRE
- Journal :
- IEEE Design & Test of Computers
- Accession number :
- edsair.doi...........5a28ab87e0585d11217894f510af02fd
- Full Text :
- https://doi.org/10.1109/mdt.1987.295211