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On-chip clock oscillator for high precision RSFQ applications

Authors :
V. Kaplunenko
Source :
IEEE Transactions on Appiled Superconductivity. 13:575-578
Publication Year :
2003
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2003.

Abstract

This paper discusses the possible modifications of the flux-flow oscillator, which is a part of an integrated receiver, for use as a precise clock oscillator in RSFQ circuits. At the price of losing tunability, the flux-flow oscillator can be used at resonance modes. To get higher clock rates, a parallel array of 20 identical under-damped Josephson junctions connected by superconducting micro-strip lines can also be used with an SIS mixer to form a phase-locked loop. The array shows a sharp resonance at 600 GHz, which can be used to make a precise on-chip clock. The linewidth of the emitted power of 150 kHz was estimated from the step differential resistance (free-run stability of 2.5 /spl middot/ 10/sup -7/). To convert frequency down to the desired level the array was matched to an over-damped pair of junctions, which form a precise frequency divider. The divider almost does not add any time jitter, thus the linewidth of 15 kHz can be achieved at 60 GHz. The clock stability can be improved by using an on-chip phase-locked-loop (PLL). The main part of the PLL is a phase detector, which can be based on an RSFQ Josephson sampler combined with an RSFQ fast counter. The suggested circuit probably could not compete with an SIS mixer, but significantly simplifies the circuit, and enables an on-chip RSFQ PLL closed by RSFQ frequency meter and DAC.

Details

ISSN :
10518223
Volume :
13
Database :
OpenAIRE
Journal :
IEEE Transactions on Appiled Superconductivity
Accession number :
edsair.doi...........5a8f9b189d05bffe8a1caf6d6f7d0a4f
Full Text :
https://doi.org/10.1109/tasc.2003.813950