BCD Adder Designs Based on Three-Input XOR and Majority Gates

MLA

Lunyao Wang, et al. “BCD Adder Designs Based on Three-Input XOR and Majority Gates.” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, June 2021, pp. 1942–46. EBSCOhost, https://doi.org/10.1109/tcsii.2020.3047393.

APA

Lunyao Wang, Yinshui Xia, Zeqiang Li, Weiqiang Liu, & Zhufei Chu. (2021). BCD Adder Designs Based on Three-Input XOR and Majority Gates. IEEE Transactions on Circuits and Systems II: Express Briefs, 68, 1942–1946. https://doi.org/10.1109/tcsii.2020.3047393

Chicago

Lunyao Wang, Yinshui Xia, Zeqiang Li, Weiqiang Liu, and Zhufei Chu. 2021. “BCD Adder Designs Based on Three-Input XOR and Majority Gates.” IEEE Transactions on Circuits and Systems II: Express Briefs 68 (June): 1942–46. doi:10.1109/tcsii.2020.3047393.