FPGA Implementation of Modular Multiplier in Residue Number System

MLA

Yinan Kong, and Selim Hossain. “FPGA Implementation of Modular Multiplier in Residue Number System.” 2018 IEEE International Conference on Internet of Things and Intelligence System (IOTAIS), Nov. 2018. EBSCOhost, https://doi.org/10.1109/iotais.2018.8600881.

APA

Yinan Kong, & Selim Hossain. (2018). FPGA Implementation of Modular Multiplier in Residue Number System. 2018 IEEE International Conference on Internet of Things and Intelligence System (IOTAIS). https://doi.org/10.1109/iotais.2018.8600881

Chicago

Yinan Kong, and Selim Hossain. 2018. “FPGA Implementation of Modular Multiplier in Residue Number System.” 2018 IEEE International Conference on Internet of Things and Intelligence System (IOTAIS), November. doi:10.1109/iotais.2018.8600881.