Cite
Harnessing Numerical Flexibility for Deep Learning on FPGAs
MLA
Andrew Bitar, et al. “Harnessing Numerical Flexibility for Deep Learning on FPGAs.” Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, June 2018. EBSCOhost, widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edsair&AN=edsair.doi...........632ae584f5d1f87026f9bb083b0ccbc9&authtype=sso&custid=ns315887.
APA
Andrew Bitar, Josh Fender, Andrew Ling, Suchit Subhaschandra, David Han, Gordon Raymond Chiu, Roberto DiCecco, Shane O’Connell, Mohamed S. Abdelfattah, Dmitry Denisenko, & Chris N. Johnson. (2018). Harnessing Numerical Flexibility for Deep Learning on FPGAs. Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies.
Chicago
Andrew Bitar, Josh Fender, Andrew Ling, Suchit Subhaschandra, David Han, Gordon Raymond Chiu, Roberto DiCecco, et al. 2018. “Harnessing Numerical Flexibility for Deep Learning on FPGAs.” Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, June. http://widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edsair&AN=edsair.doi...........632ae584f5d1f87026f9bb083b0ccbc9&authtype=sso&custid=ns315887.