Electrical Properties of Low-$V_{T}$ Metal-Gated n-MOSFETs Using $\hbox{La}_{2}\hbox{O}_{3}/\hbox{SiO}_{x}$ as Interfacial Layer Between HfLaO High-$\kappa$ Dielectrics and Si Channel

In this letter, we report that by employing the La2O3/SiOx interfacial layer between HfLaO (La = 10%) high- and Si channel, the Ta2C metal-gated n-MOSFETs VT can be significantly reduced by ~350 mV to 0.2 V, satisfying the low-Vy device requirement. The resultant n-MOSFETs also exhibit an ultrathin equivalent oxide thickness (~1.18 nm) with a low gate leakage (JG = 10 mA/cm2 at 1.1 V), good drive performance (Ion = 900 muA/mum at Isoff = 70 nA/mum), and acceptable positive-bias-temperature-instability reliability.