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Reliability improvement scheme of DDR controller based on FPGA

Authors :
Han Shengya
Chen Feng
Li Yan
Kui Xiong
Linlin Tang
Zhimei Zhou
Yong Wan
Tang Xiaoke
Source :
2021 4th International Conference on Advanced Electronic Materials, Computers and Software Engineering (AEMCSE).
Publication Year :
2021
Publisher :
IEEE, 2021.

Abstract

This article first discusses the DDR3 system calibration principle of the Virtex-7 series FPGA, analyzes the reliability of the DDR3 controller under different temperature and voltage conditions, and then proposes a solution to improve the reliability of the DDR3 controller. Simulation verification and on-board debugging test results show that this solution can effectively improve the reliability of the DDR3 system in FPGA devices under different temperature and voltage changes.

Details

Database :
OpenAIRE
Journal :
2021 4th International Conference on Advanced Electronic Materials, Computers and Software Engineering (AEMCSE)
Accession number :
edsair.doi...........657cc8c929aa8e17e5d953404a0b7c57