FinFET SRAM Cell for Low Power Applications

The limitations of the CMOS scaling has opened the path for Nano-Scaled devices. FinFET is one of the promising devices after CMOS with a great feature of low leakage. Since the inception of hand help devices, SRAM memories play a vital role in the performance of these devices. Thus, a need for stable, low power SRAM memories is in demand. In this paper, two different types of low power SRAM cell using FinFET have been proposed, analyzed, and compared. The simulation has been done at 20nm FinFET technology for subthreshold operations. It has been observed that 9T improved SRAM cell has low leakage current and static power as compared to 9T and 6T SRAM cell. The stability factors have also been calculated and found that Write Static Noise Margin (WSNM) of improved 9T SRAM cell achieves an improvement of 1.49x over the other two cells. Read Static Noise Margin (RSNM) of 9T improved SRAM cell makes an improvement of 1.4x over 6T SRAM and 9T SRAM. The Hold Margin was also better in the case of improved SRAM cell at the supply voltage of 0.4V. The variation in the RSNM with gate length for the cells 9T SRAM and 9T improved FinFET SRAM has been observed. Overall the performance of 9T improved is better as compared to 9T FinFET SRAM cell.