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A 1.8 V 2 Gb NAND flash memory for mass storage applications

Authors :
June Lee
Kyong-Hwa Lee
Wang-Chul Shin
Byung-Soon Choi
Jong-Sik Lee
Dae-Seok Byeon
Young-Ho Lim
Ohsuk Kwon
Kyeong-Han Lee
Sung-Soo Lee
Kang-Deog Suh
Jeong-Hyuk Choi
In Young Kim
Source :
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..
Publication Year :
2003
Publisher :
IEEE, 2003.

Abstract

A 1.8 V 2 Gb NAND flash memory is fabricated in a 90 nm process resulting in a 141 mm/sup 2/ die and a 0.044 /spl mu/m/sup 2/ effective cell. To achieve the high level of integration, critical layers are patterned with KF photolithography and phase-shift masks with proximity correction.

Details

Database :
OpenAIRE
Journal :
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.
Accession number :
edsair.doi...........76bf117116afd92f1a7f70fed176c3b2
Full Text :
https://doi.org/10.1109/isscc.2003.1234306