A novel 10-transistor low-power high-speed full adder cell

MLA

Shu Yan, et al. “A Novel 10-Transistor Low-Power High-Speed Full Adder Cell.” 2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443), Aug. 2005. EBSCOhost, widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edsair&AN=edsair.doi...........7761edb688f69dc41c8860a1a38b3c09&authtype=sso&custid=ns315887.

APA

Shu Yan, Lin Zhenghui, Lu Junming, & Wang Ling. (2005). A novel 10-transistor low-power high-speed full adder cell. 2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443).

Chicago

Shu Yan, Lin Zhenghui, Lu Junming, and Wang Ling. 2005. “A Novel 10-Transistor Low-Power High-Speed Full Adder Cell.” 2001 6th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.01EX443), August. http://widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edsair&AN=edsair.doi...........7761edb688f69dc41c8860a1a38b3c09&authtype=sso&custid=ns315887.