A novel SEU-tolerant MRAM latch circuit based on C-element

Benefiting from its inherent hardness to radiation and non-volatility, magnetic random access memory (MRAM) is considered as one of the most promising non-volatile memory (NVM) technologies for aerospace and avionic electronics. However, MRAM is still sensitive to single event upsets (SEU) due to its CMOS employed peripheral circuit. In this paper, we propose a novel SEU-tolerant MRAM latch circuit, which is based on the special device C-element. By using a physics-based MTJ compact model and the 40nm design kit, hybrid simulations have been performed and simulation results show that the proposed MRAM latch circuit is immune to radiation effects.