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Design of FPGA-based Moore FSM with two sources of state codes
- Source :
- AIP Conference Proceedings.
- Publication Year :
- 2015
- Publisher :
- AIP Publishing LLC, 2015.
-
Abstract
- A method for reducing the number of LUT elements in the circuit of FPGA-based Moore FSM is proposed. The method is based on using two sources of codes of pseudoequivalent states. It allows reducing the number of terms in systems of input memory functions up to this value for equivalent Mealy FSM. The system of microoperations is implemented using embedded memory blocks.
Details
- ISSN :
- 0094243X
- Database :
- OpenAIRE
- Journal :
- AIP Conference Proceedings
- Accession number :
- edsair.doi...........8028f67cb6927b01f23fb5a22aa7b573