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Tunnel FinFET CMOS inverter with very low short-circuit current for ultralow-power Internet of Things application

Authors :
Koichi Fukuda
Hiroyuki Ota
Kazuhiko Endo
Yongxun Liu
Shintaro Otsuka
Hiroshi Fuketa
Shin Ichi O'uchi
Wataru Mizubayashi
Yukinori Morita
Meishoku Masahara
Shinji Migita
Takashi Matsukawa
Takahiro Mori
Source :
Japanese Journal of Applied Physics. 56:04CD19
Publication Year :
2017
Publisher :
IOP Publishing, 2017.

Abstract

We have demonstrated the operation of a CMOS inverter consisting of Si tunnel FinFETs. Both p- and n-type tunnel FinFETs are successfully fabricated and operated on the same SOI wafer. The current mismatch between p- and n-type tunnel FETs is compensated by tuning the number of fin channels. Very low short-circuit current and clear voltage input–output characteristics are obtained. The thin epitaxial channel in the tunnel FinFETs effectively increases the drain current and accordingly reduces the drain capacitance, which could help high-performance tunnel FET CMOS inverter operation.

Details

ISSN :
13474065 and 00214922
Volume :
56
Database :
OpenAIRE
Journal :
Japanese Journal of Applied Physics
Accession number :
edsair.doi...........82d864c003c3f1efa03074cedc92243b
Full Text :
https://doi.org/10.7567/jjap.56.04cd19