Termination area design for reduced leakage current and improved ruggedness of HV IGBTs

A termination design which efficiently reduces leakage current and improves robustness of very high voltage insulated gate bipolar transistors (IGBTs) (>3.3 kV) without adversely affecting other device characteristics is presented here. Proposed design uses a selectively formed Buried N+ layer in the N-buffer under the termination region. Optimised placement of the N+ buried regions reduces carrier modulation in the termination area thus lowering the leakage current and reducing maximum temperature during the reverse bias safe operating area tests. This improves dynamic ruggedness of the IGBT without deteriorating other device characteristics.