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Field programmable gate array based parallel matrix multiplier for 3D affine transformations

Authors :
Abbes Amira
Faycal Bensaali
Source :
IEE Proceedings - Vision, Image, and Signal Processing. 153:739
Publication Year :
2006
Publisher :
Institution of Engineering and Technology (IET), 2006.

Abstract

3D graphics performance is increasing faster than any other computing application. Almost all PC systems now include 3D graphics accelerators for games, computer aided design or visualisation applications. This article investigates the suitability of field programmable gate array devices as an accelerator for implementing 3D affine transformations. Proposed solution based on processing large matrix multiplication have been implemented, for large 3D models, on the RC1000 Celoxica board based development platform using Handel-C. Outstanding results have been obtained for the acceleration of 3D transformations using fixed and floating-point arithmetic.

Details

ISSN :
1350245X
Volume :
153
Database :
OpenAIRE
Journal :
IEE Proceedings - Vision, Image, and Signal Processing
Accession number :
edsair.doi...........a0b9ce9e78c1fa3a5defd5ec084161b0
Full Text :
https://doi.org/10.1049/ip-vis:20045076