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Design of an efficient active noise cancellation circuit for in-ear headphones
- Source :
- APCCAS
- Publication Year :
- 2014
- Publisher :
- IEEE, 2014.
-
Abstract
- This paper proposes an efficient active noise cancelling (ANC) circuit design for the in-ear headphones. We develop a hardware oriented Least Mean Square (LMS) adaptive algorithm, and design a modified high-performance feed-forward ANC architecture which only uses one microphone to effectively cancel broadband noise for the in-ear headphones. The proposed ANC circuit design has been successfully implemented through adopting the standard cell-based design flow based on the TSMC 90nm CMOS technology. Besides, the proposed design has been verified under versatile noisy scenarios for its real-time ANC performance by using a Field Programmable Gate Array (FPGA) platform. Experimental results show that the proposed high-performance circuit design can reduce disturbing noise of various frequency bands very well, and outperforms the existing works. The proposed design can attenuate the broadband pink noise between 300 Hz to 900 Hz, with a maximum performance of 18 dB. Moreover, the proposed design can achieve 406.5 k samples/sec data throughput rate at operating frequency of 50 MHz, at the costs of 111.7 k gates and power consumption of 4.47 mW.
Details
- Database :
- OpenAIRE
- Journal :
- 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
- Accession number :
- edsair.doi...........a97b7f5368ecd917e1aa090e9ef28217