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Low-temperature annealing of heavily ion-implanted layer

Authors :
Tadashi Shibata
Akira Okita
Yoshio Ishihara
Tadahiro Ohmi
Source :
Electronics and Communications in Japan (Part II: Electronics). 73:86-91
Publication Year :
1990
Publisher :
Wiley, 1990.

Abstract

Crystallinity recovery, impurity activation and stress relief in a heavily ion-implanted layer by ultrahigh-vacuum ion-implantation during low-temperature annealing were investigated and the following results were obtained. The crystallinity of the layer heavily doped with arsenic ions was recovered at 550°C for 75 min and the impurities were activated sufficiently. Furthermore, the impurity level distribution supported the LSS theory and the maximum carrier concentration was 1.6 × 1020 cm−3. The reverse current of the p-n junction formed by this method was two orders of magnitude lower than that in a conventional device. In the p-n junction formed by continuous ion implantation of arsenic and phosphorus to relieve the stress in the implanted layer, the reverse current decreased further. When the stress was most relieved, the carrier activation rate was highest and the p-n junction reverse current was lowest.

Details

ISSN :
15206432 and 8756663X
Volume :
73
Database :
OpenAIRE
Journal :
Electronics and Communications in Japan (Part II: Electronics)
Accession number :
edsair.doi...........ab4c8885f046d26059bf5932ffff43ab
Full Text :
https://doi.org/10.1002/ecjb.4420730610