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A near-threshold all-digital PLL with a bootstrapped DCO using low-dropout regulator for mitigating PVT-variations

Authors :
Chulwoo Kim
Sangsu Lee
Jaehun Jun
Source :
ISOCC
Publication Year :
2017
Publisher :
IEEE, 2017.

Abstract

Low-power operation is essential for emerging fields in the circuit design such as Internet of Things(IoT) and Biomedical applications. Since the supply voltage is a major factor that affects the total power consumption, design in Near-Threshold Voltage(NTV) region which is known to have the advantages of both power-saving and well-performance can be an effective way to overcome the constraints. This paper presents an ADPLL(All-Digital Phase-Locked Loop) operating in NTV region. Bootstrapped ring oscillator(BTRO) is used for the PVT tolerance of the Digitally Controlled Oscillator(DCO) and Low-Dropout Regulator(LDO) is adopted for the optimal control of the supply voltage. This ADPLL operates at 480MHz with a power consumption of 152uW under a supply voltage of 0.55V.

Details

Database :
OpenAIRE
Journal :
2017 International SoC Design Conference (ISOCC)
Accession number :
edsair.doi...........b16b30afba34d89475ff9c348cd68156
Full Text :
https://doi.org/10.1109/isocc.2017.8368869