Substrate potential of high-voltage GaN-on-Si HEMTs and half-bridges: Static and dynamic four-terminal characterization and modeling

Substrate termination of lateral 600 V-class GaN-on-Si HEMTs and half-bridges other than source-connection is investigated: Using conductive Si-substrates as current-return path and the GaN-buffer for high-side transistor-to-heatsink isolation eliminates parasitic inductances and thermal interfaces. Floating-substrate reduced 440 V switching times to 60% (reduced output capacitance) and fixed-to-ground substrate thermal resistance to 54%. However, substrate-to-gate capacitive-coupling significantly increases gate-charge which is analyzed using four-terminal measurements and simulations. Measured high-side current-collapse with fixed-to-ground high-side substrate termination (switching over 300 V, 2 MHz) is more pronounced in first-quadrant compared to third-quadrant conduction, and explained by dynamic source-access-region voltage feedback to the source-referenced gate-driver.