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Through-Silicon Hole Interposers for 3-D IC Integration

Authors :
Yu-Mei Cheng
Ren-Shing Cheng
Li-Ling Liao
Jui-Feng Hung
Yu-Lin Chao
Ra-Min Tain
Ming-Ji Dai
Yu-Wei Huang
Heng-Chieh Chien
Chun-Hsien Chien
Wei-Chung Lo
Chau-Jie Zhan
Ching-Kuan Lee
Ming-Jer Kao
Sheng-Tsai Wu
John H. Lau
Source :
IEEE Transactions on Components, Packaging and Manufacturing Technology. 4:1407-1419
Publication Year :
2014
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2014.

Abstract

In this investigation, a system-in-package (SiP) that consists of a very low-cost interposer with through-silicon holes (TSHs) and with chips on its top and bottom sides (a real 3-D IC integration) is studied. Emphasis is placed on the fabrication of a test vehicle to demonstrate the feasibility of this SiP technology. The design, materials, and process of the top chip, bottom chip, TSH interposer, and final assembly will be presented. Shock and thermal cycling tests will be performed to demonstrate the integrity of the SiP structure.

Details

ISSN :
21563985 and 21563950
Volume :
4
Database :
OpenAIRE
Journal :
IEEE Transactions on Components, Packaging and Manufacturing Technology
Accession number :
edsair.doi...........b4899c0a43489c421c7a9a17198bae8a
Full Text :
https://doi.org/10.1109/tcpmt.2014.2339832