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FDSOI vs FinFET: differentiating device features for ultra low power & IoT applications
- Source :
- ICICDT
- Publication Year :
- 2017
- Publisher :
- IEEE, 2017.
-
Abstract
- This paper reviews the main differentiating features of planar FDSOI devices vs planar bulk and 3D FinFETs for ultra-low power and IoT (Internet of Things) applications. The interest of using back-bias, the specific FDSOI device/design feature, to maximize the performance/power efficiency, to mitigate the process variability and to suppress the leakage is highlighted in this paper. Low parasitic gate capacitance, low V T mismatch associated with its undoped channel, and low gate resistance linked to the gate-first integration also bring some competitive advantages to FDSOI over FinFETs for Analog and RF devices.
- Subjects :
- Engineering
Ultra low power
business.industry
Gate resistance
Electrical engineering
020206 networking & telecommunications
Hardware_PERFORMANCEANDRELIABILITY
02 engineering and technology
021001 nanoscience & nanotechnology
Planar
Hardware_INTEGRATEDCIRCUITS
0202 electrical engineering, electronic engineering, information engineering
Electronic engineering
Process variability
0210 nano-technology
business
Internet of Things
Gate capacitance
Electrical efficiency
Leakage (electronics)
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2017 IEEE International Conference on IC Design and Technology (ICICDT)
- Accession number :
- edsair.doi...........be48e2de52ce92560094823aae879761