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Atomic Layer Deposition for CMOS Scaling: High-k Gate Dielectrics on Si, Ge, and III-V Semiconductors
- Source :
- ECS Transactions. 11:187-200
- Publication Year :
- 2007
- Publisher :
- The Electrochemical Society, 2007.
-
Abstract
- We review the impact of oxide-semiconductor interface chemistry and precursor choice on the quality of novel field-effect transistor gate dielectrics grown by atomic layer deposition (ALD). Focus is on hafnium- and aluminum-based high-permittivity ('high-k') gate dielectrics on silicon and on high carrier mobility (germanium, gallium arsenide) channels. We shed light on the ways processing parameters (choice of materials; surface preparation; high-k dielectric deposition process) determine stack structure (continuity of the high-k layer; interfacial oxide thickness; detrimental channel-dielectric interactions) and hence electrical quality. Trends are rationalized based on thermodynamic properties of the semiconductors, dielectrics, and metal-organic precursors involved. This may serve as a basic guideline for ALD precursor selection.
Details
- ISSN :
- 19386737 and 19385862
- Volume :
- 11
- Database :
- OpenAIRE
- Journal :
- ECS Transactions
- Accession number :
- edsair.doi...........bec70642bc3b387f87267cce38ddd528
- Full Text :
- https://doi.org/10.1149/1.2779083