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Performance Analysis of Cascaded Multilevel Inverter with Reduced Switched Topology

Authors :
V. Jegathesan
Ramu Bhukya
Bommina Sravani Vijaya Bharathi
Durga Prasad Garapati
Praveen Kumar Nalli
Sssr Sarathbabu Duvvuri
Source :
2018 IEEE 8th Power India International Conference (PIICON).
Publication Year :
2018
Publisher :
IEEE, 2018.

Abstract

Multilevel inverter plays a crucial role in industrial applications. The performance of cascaded multilevel inverter (CMLI) with reduced switch count is analyzed in this paper. If the switches have been increased the switching loss and THD will increase. The preferred topology is simulated for seven level and fifteen level by considering isolated DC source and PV. The reduced % THD is identified compare to other topologies. Four switches continuously working at fundamental switching frequency is considered as one of the advantage of the topology.

Details

Database :
OpenAIRE
Journal :
2018 IEEE 8th Power India International Conference (PIICON)
Accession number :
edsair.doi...........c152d1f6b65e529e8edb8e2ceb85e186
Full Text :
https://doi.org/10.1109/poweri.2018.8704350