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Power distribution network (PDN) design and analysis of a single and double-sided high bandwidth memory (HBM) interposer for 2.5D Terabtye/s bandwidth system
- Source :
- 2016 IEEE International Symposium on Electromagnetic Compatibility (EMC).
- Publication Year :
- 2016
- Publisher :
- IEEE, 2016.
-
Abstract
- A 3-D stacked high bandwidth memory (HBM) becomes a promising solution to satisfy the memory bandwidth for the processor. Due to its unique memory architecture that consists of tremendous number of input/output (I/O), it is inevitable to employee Silicon based interposer. Therefore, power distribution network (PDN) design and analysis of HBM interposer becomes one of the important step to guarantee the performance of an entire memory interface. Since the back end of line (BEOL) process technology of a semiconductor industry is applied for HBM interposer, the control of a metal density and the management of wafer warpage are required. Therefore, we designed and analyzed meshed and grid type of PDN for HBM interposer because of the limit of a metal density. In addition, we also designed and analyzed PDN both a single- and double-sided interposer. Because, a double-sided interposer has an advantage of a warpage management compared to a single-sided interposer. For the suppression of simultaneous switching noise (SSN), PDN impedance with a decoupling capacitor scheme must be properly analyzed. In this paper, a single- and double-sided HBM interposer is designed with the five layers and six layers respectively to analyze PDN impedance including though-Silicon-via (TSV). PDN impedance of HBM interposer is simulated and analyzed in the frequency range from 100 MHz to 20 GHz. Based on the designed HBM interposer, we shows the great potential of HBM interposer in terms of the reduction of PDN impedance to suppress SSN with a metal-insulator-metal (MIM) decoupling capacitor.
- Subjects :
- 010302 applied physics
Engineering
Software_OPERATINGSYSTEMS
business.industry
Bandwidth (signal processing)
Electrical engineering
Memory bandwidth
High Bandwidth Memory
Decoupling capacitor
01 natural sciences
Back end of line
0103 physical sciences
Memory architecture
Electronic engineering
Interposer
business
Electrical impedance
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2016 IEEE International Symposium on Electromagnetic Compatibility (EMC)
- Accession number :
- edsair.doi...........d520e007961f779eab33c50f44745bcb