Rounding error in the computation of opposite sign floating point number parametric addition: a case study

Authors :: G.R. Sechi
M. Bartolucci
Source :: Microprocessing and Microprogramming. 40:833-839
Publication Year :: 1994
Publisher :: Elsevier BV, 1994.
Abstract: This paper presents a study about rounding error arising in the addition of opposite sign floating point operands: the algebraic study of the adder functionalities provides the possibility to modify hardware in order to measure the rounding error effect in terms of error size and incoming rate.

Subjects :: Computer Science::Hardware Architecture
Adder
Floating point
Computer science
Computation
Rounding
General Engineering
Hardware_ARITHMETICANDLOGICSTRUCTURES
Round-off error
Error detection and correction
Algorithm
Sign (mathematics)
Parametric statistics

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