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Toward High Performance SiGe Channel CMOS: Design of High Electron Mobility in SiGe nFinFETs Outperforming Si
- Source :
- 2018 IEEE International Electron Devices Meeting (IEDM).
- Publication Year :
- 2018
- Publisher :
- IEEE, 2018.
-
Abstract
- For the first time, high electron mobility in tensile-strained SiGe channel nFinFETs outperforming Si is reported to explore the feasibility of high performance SiGe CMOS. To examine the electron mobility behaviors in SiGe channel, a series of tensile-strained SiGe nFinFETs are fabricated on various strain relaxed buffer layers by taking into account the minimum threading dislocation density and strain engineering. For SiGe $(\text{Ge} > 20\%)$ nFinFETs, we identify the existence of additional electron trapping site close to the conduction band edge in IL/HK, leading to the abnormal Vt shift, PBTI degradation, and low electron mobility. We also fabricated short-channel SiGe nFinFETs, which exhibit excellent cut-off behavior and electrostatics (SS ∼65mV/dec and DIBL ∼18mV at $\mathrm{V}_{\text{DD}}=0.7\mathrm{V}$ ). In addition, the dynamic performance of tensile-strained SiGe CMOS against Si CMOS is evaluated by TCAD simulation based on experimental data.
- Subjects :
- 010302 applied physics
Electron mobility
Materials science
business.industry
Electron trapping
02 engineering and technology
021001 nanoscience & nanotechnology
Electrostatics
01 natural sciences
Strain engineering
CMOS
0103 physical sciences
Optoelectronics
0210 nano-technology
High electron
business
Simulation based
Conduction band
Subjects
Details
- Database :
- OpenAIRE
- Journal :
- 2018 IEEE International Electron Devices Meeting (IEDM)
- Accession number :
- edsair.doi...........d5aa63296f146ffade8e0e00a842aaa2