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A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration

Authors :
Nan Qi
Yang Xu
Baoyong Chi
Xiaobao Yu
Xing Zhang
Ni Xu
Patrick Chiang
Woogeun Rhee
Zhihua Wang
Source :
IEEE Transactions on Circuits and Systems I: Regular Papers. 59:1720-1732
Publication Year :
2012
Publisher :
Institute of Electrical and Electronics Engineers (IEEE), 2012.

Abstract

A fully integrated dual-channel reconfigurable GNSS receiver supporting Compass/GPS/GLONASS/Galileo systems is implemented in 65 nm CMOS. The receiver incorporates two independent channels to receive dual-frequency signals simultaneously. GNSS signals located at the 1.2 GHz or 1.6 GHz bands are supported, with their bandwidths programmable among 2.2 MHz, 4.2 MHz, 8 MHz, 10 MHz, and 18 MHz. By implementing a flexible frequency plan with a low/zero-IF architecture and reconfigurable analog baseband circuits, only one frequency synthesizer is required to provide the local oscillator (LO) frequency for two channels, thereby avoiding any LO crosstalk. Analog baseband circuits employ operational amplifiers that are capable of power scaling, in order to minimize power consumption across different operating modes. An I/Q mismatch calibration module placed prior to the complex-IF bandpass filter is implemented to improve the image rejection ratio. The receiver achieves a minimum 1.88 dB noise figure, an average 50 dB image rejection ratio, and a 64 dB dynamic range with 1 dB steps of gain-adjustment, with a total power consumption of 31-44 mW. Finally, experimental verification combining both the receiver and a digital baseband shows a positioning result comparable to commercial chips.

Details

ISSN :
15580806 and 15498328
Volume :
59
Database :
OpenAIRE
Journal :
IEEE Transactions on Circuits and Systems I: Regular Papers
Accession number :
edsair.doi...........dd0088ca183b63af0beb8bb1424692bd