Single Pulse Avalanche Robustness and Analysis for 1200-V SiC Junction Barrier Schottky Diode

In this paper, the single pulse avalanche robustness of 1.2kV 4H-SiC Junction Barrier Schottky (JBS) diode with different designs is investigated. The unclamped inductive switching (UIS) tests are carried out to obtain avalanche energy capability. It is found that the JBS diode with the narrower spacing of the P+ region exhibits higher avalanche robustness (around 5%~8.5% improvement in this paper). Simulation analysis reveals that there is a current crowding in avalanche mode, which will be more severe with the increasing spacing of P+ regions. The localized current crowding and unbalanced current distribution can lead to a reduced effective power dissipation area and a higher junction temperature, which is adverse for the device avalanche robustness. Therefore, in the process of device design and optimization, avalanche robustness can be improved by alleviating the issue of the current crowding, which is beneficial to enhance the product's competitiveness and expand the application of the device.