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Evaluation of Etch Behavior of Doped Silicon Wafer in Wet Cleaning Process

Authors :
Drew Sinha
Source :
Journal of The Electrochemical Society. 155:H228
Publication Year :
2008
Publisher :
The Electrochemical Society, 2008.

Abstract

Determination of the silicon etch rate of a number of n- and p-type doped epitaxial silicon wafers with different crystal orientations, dopant types, and dopant levels have been made. Oxidation behavior of the silicon in solution is found to be affected by the doping level of the arsenic doped wafer. Observed variation in the removal rate of the chemical mechanical polishing (CMP) process for these doped silicon wafers is correlated with the etch rates. The surface quality of these wafers following CMP and standard clean chemical treatment is found to impact the defect level and cleanliness of the post-CMP cleaning process. Resistance to oxidation and chemical dissolution of silicon is explained by the generation of surface charge, charge transfer mechanism, etching anisotropy, and activation energy for surface reaction caused by the dopant and crystal orientation. Information obtained thereof is useful to develop the wafer-manufacturing process, starting from silicon crystal to the final clean substrate or epi wafer with low surface defects.

Details

ISSN :
00134651
Volume :
155
Database :
OpenAIRE
Journal :
Journal of The Electrochemical Society
Accession number :
edsair.doi...........dfa8bd6a3a06561904652ee1615d623a